ScreenShots:
Software Description:
IO Checker uses rules (based on regularexpressions) to match the signal names in both the FPGA and PCBdesign environment. It allows the tool to validate groups ofmatches although individual signals can still differ. The rules canbe generated automatically and be fine-tuned by the designer. Theautomated approach will often match 80% to 90% of all devicepins.
The flexibility of IO Checker allows it to be used in any designflow and does not require any design methodology. The rulesgenerator in combination with the sorted problem view allowsengineers to validate a 1000+ pins device in half an hour
Once the project and its rules are defined it is a simple task tokeep the FPGA and PCB data consistent. All out-of-date files areprocessed in one action and all changes are reported.
Here are some key features of “IO Checker”:
– Compare FPGA and PCB pin names using regular expressions
– Create & update FPGA constraint file
– Automatic rule generation
– Voltage checks for power pins
– User directed acceptance of verified differences
– One click verification and consistency
– Reports incremental changes in pin- and net list
– Concentrate on a dozen differences instead of a thousandlines
– Fits in any design flow
– HTML report
Installer Size: 49.76 + 50.46 MB
Download Links > IO Checker v3.2 R1 + Crack